74LS158 Quad 2 -Input Multiplexer IC (74158) DIP-16 Package

The 74HC163; 74HCT163 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action. It causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW after the next positive-going transition on the clock input (CP). This action occurs regardless of the levels at input pins PE, CET and CEP. This synchronous reset feature enables the designer to modify the maximum count with only one external NAND gate. The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascaded stage. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC

Features :-

• Complies with JEDEC standard no. 7A
• Input levels:

For 74HC163: CMOS level For 74HCT163: TTL level

• Synchronous counting and loading
• 2 count enable inputs for n-bit cascading
• Synchronous reset
• Positive-edge triggered clock
• ESD protection:

HBM JESD22-A114F exceeds 2 000 V MM JESD22-A115-A exceeds 200 V

• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

This device contains gates configured to perform a 4-2-3-2input AND-OR-INVERT function.

The 74F240 are octal buffers and line drivers designed to be employed as memory and address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved PC and board density.

Features:-

• 3-STATE outputs drive bus lines or buffer memory address registers
• Outputs sink 64mA (48mA mil)
• 12mA source current
• Input clamp diodes limit high-speed termination effects

74HC158 is a 16 Pin Quad 2-Input Multiplexer IC having 2V to 6V Operating Voltage range with 1uA Low Input current and high noise immunity. It select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions.

Features:-

• Common Select Input
• Separate Enable Inputs
• Buffered inputs and Outputs
• Fanout (Over Temperature Range)
• Standard Outputs  : 10 LSTTL Loads
• Bus Driver Outputs : 15 LSTTL Loads
• Wide Operating Temperature Range : -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
• 2V to 6V Operation
• High Noise Immunity: NIL = 30%, NIH = 30%of VCC at VCC = 5V
• HCT Types-
• 4.5V to 5.5V Operation
• Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
• CMOS Input Compatibility, Il≤1μA at VOL, VOH