74F533 Octal Transparent Latch with 3-State Outputs IC (74533) DIP-20 Package

The  F280  is  a  high-speed  parity  generator/checker  that accepts  nine  bits  of  input  data  and  detects  whether  an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. I fan odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even out-put

The 74HC241; 74HCT241 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on 1OE or LOW on 2OE causes the associated outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. The 74HCT241 device features reduced input threshold levels to allow interfacing to TTL logic levels.

The 74F138 decoder accepts three binary weighted inputs (A0, A1, A2) and when enabled, provides eight mutually exclusive, active low outputs (Q0 – Q7). The device features three enable inputs; two active low (E0, E1) and one active high (E2). Every output will be high unless E0 and E1 are low and E2 is high. This multiple enable function allows easy parallel expansion of the device to 1–of–32 (5 lines to 32 lines) decoder with just four 74F138s and one inverter The device can be used as an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. Enable inputs not used must be permanently tied to their appropriate active high or active low state.

Features :-

• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Industrial temperature range available (–40°C to +85°C)

 

The 74F182 is a high-speed carry lookahead generator. It is  generally  used  with  the  74F181  or  74F381  4-bit  arithmetic  logic  units  to  provide  high-speed  lookahead  over word lengths of more than four bits

Features :-

• Provides lookahead carries across a group of four ALUs
• Multi-level  lookahead  high-speed  arithmetic  operation over long word lengths